Mixed-Signal Verification Engineer

Come join Apple's growing wireless silicon development team. Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level. All of which is driven by a world-class vertically integrated engineering team, spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation and FW/SW engineering.

Description

In this highly visible role, you will be at the center of a wireless Mixed-Signal silicon design group, with a critical impact on getting innovative and functional products to hundreds of millions of customers quickly.

As a Mixed Signal Design Verification Engineer, you will be responsible for the verification of RF and mixed-signal blocks and their interfaces within the wireless SoC. You will interact with the analog/RF design team, digital DV team digital design team, and wireless system team to develop best-in-class verification methodologies that ensure silicon-correct functionality with optimal coverage and time-to-tapeout trade-off.

Responsibilities:

Review specifications, extract features, define and execute verification plan

Develop top/block level Mixed Signal and Digital testbench and generate tests in a UVM framework

Build and reuse monitors, and checkers for RF/Mixed-Signal blocks

Debug failures, fix testbench/model/checker issues, manage bug tracking, and analyze and close coverage

Write scripts for automation of flow

Improve Mixed Signal verification methodology with novel ideas and leveraging AI

Collaborate with the Analog Design Team

Preferred Qualifications

Masters or PhD degree in technical disciplines with at least 5+ years of hands-on experience in specifically

Mixed-Signal verification

Wireless experience is a plus

Expertise creating and using real-numbered analog behavioral models in System Verilog a plus.

Ability to work well in a team and be productive under aggressive schedule

Excellent communication skills, self-motivation/organization and the desire to take diverse challenges.

Minimum Qualifications

BS and a minimum of 10 years relevant industry experience

Industry verification experience with RF/Mixed-Signal blocks and SOCs

Expertise building Mixed-Signal testbenches, checkers and tests using System Verilog

Experience in UVM methodology and HDL (System Verilog, Verilog) for verification

Strong verification skills in problem solving, testing, and debugging

Understanding of common analog/RF blocks

Experience with UPF, Python or Matlab a plus

Experience with Virtuoso Composer, ADE, and HED also a plus

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $171,600 and $302,200, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.